Test structures without metal contacts for DC measurement of 2D-materials deposited on silicon

L.K. Nanver; X. Liu; Tihomir Knezevic

doi:10.1109/ICMTS.2018.8383767

Test structures without metal contacts for DC measurement of 2D-materials deposited on silicon

L.K. Nanver, X. Liu, Tihomir Knezevic

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

8 Citations (Scopus)

4 Downloads (Pure)

Abstract

A set of ring-shaped test structures is presented for electrical characterization of 2D as-deposited layers on Si that electrically interact with the substrate. The test method is illustrated by investigation of 3 different nm-thin layers that are expected to form an interfacial layer of negative fixed charge. A test procedure is described that gives a low turnaround time and non-destructive way of evaluating different deposition methods in terms of diode characteristics, interface conductance, and electron carrier injection into the deposited layer.

Original language	English
Title of host publication	ICMTS 2018 - Proceedings of the 2018 IEEE International Conference on Microelectronic Test Structures
Place of Publication	Piscataway, NJ
Publisher	IEEE
Pages	69-74
Number of pages	6
ISBN (Electronic)	978-1-5386-5071-4
ISBN (Print)	978-1-5386-5069-1
DOIs	https://doi.org/10.1109/ICMTS.2018.8383767
Publication status	Published - 12 Jun 2018
Event	31st IEEE International Conference on Microelectronic Test Structures 2018 - Courtyard Marriott Downtown, Austin, United States Duration: 19 Mar 2018 → 22 Mar 2018 Conference number: 31

Publication series

Name	IEEE International Conference on Microelectronic Test Structures
Volume	2018-March

Conference

Conference	31st IEEE International Conference on Microelectronic Test Structures 2018
Abbreviated title	ICMTS 2018
Country/Territory	United States
City	Austin
Period	19/03/18 → 22/03/18

Keywords

aluminum
atomic layer deposition
boron
chemical vapor deposition
electron injection
interface charge

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10.1109/ICMTS.2018.8383767

Cite this

Nanver, L. K., Liu, X., & Knezevic, T. (2018). Test structures without metal contacts for DC measurement of 2D-materials deposited on silicon. In ICMTS 2018 - Proceedings of the 2018 IEEE International Conference on Microelectronic Test Structures (pp. 69-74). (IEEE International Conference on Microelectronic Test Structures; Vol. 2018-March). IEEE. https://doi.org/10.1109/ICMTS.2018.8383767

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abstract = "A set of ring-shaped test structures is presented for electrical characterization of 2D as-deposited layers on Si that electrically interact with the substrate. The test method is illustrated by investigation of 3 different nm-thin layers that are expected to form an interfacial layer of negative fixed charge. A test procedure is described that gives a low turnaround time and non-destructive way of evaluating different deposition methods in terms of diode characteristics, interface conductance, and electron carrier injection into the deposited layer.",

keywords = "aluminum, atomic layer deposition, boron, chemical vapor deposition, electron injection, interface charge",

author = "L.K. Nanver and X. Liu and Tihomir Knezevic",

note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 31st IEEE International Conference on Microelectronic Test Structures 2018, ICMTS 2018 ; Conference date: 19-03-2018 Through 22-03-2018",

year = "2018",

month = jun,

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doi = "10.1109/ICMTS.2018.8383767",

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isbn = "978-1-5386-5069-1",

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Nanver, LK, Liu, X & Knezevic, T 2018, Test structures without metal contacts for DC measurement of 2D-materials deposited on silicon. in ICMTS 2018 - Proceedings of the 2018 IEEE International Conference on Microelectronic Test Structures. IEEE International Conference on Microelectronic Test Structures, vol. 2018-March, IEEE, Piscataway, NJ, pp. 69-74, 31st IEEE International Conference on Microelectronic Test Structures 2018, Austin, Texas, United States, 19/03/18. https://doi.org/10.1109/ICMTS.2018.8383767

Test structures without metal contacts for DC measurement of 2D-materials deposited on silicon. / Nanver, L.K.; Liu, X.; Knezevic, Tihomir.
ICMTS 2018 - Proceedings of the 2018 IEEE International Conference on Microelectronic Test Structures. Piscataway, NJ: IEEE, 2018. p. 69-74 (IEEE International Conference on Microelectronic Test Structures; Vol. 2018-March).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - Test structures without metal contacts for DC measurement of 2D-materials deposited on silicon

AU - Nanver, L.K.

AU - Liu, X.

AU - Knezevic, Tihomir

N1 - Conference code: 31

PY - 2018/6/12

Y1 - 2018/6/12

N2 - A set of ring-shaped test structures is presented for electrical characterization of 2D as-deposited layers on Si that electrically interact with the substrate. The test method is illustrated by investigation of 3 different nm-thin layers that are expected to form an interfacial layer of negative fixed charge. A test procedure is described that gives a low turnaround time and non-destructive way of evaluating different deposition methods in terms of diode characteristics, interface conductance, and electron carrier injection into the deposited layer.

AB - A set of ring-shaped test structures is presented for electrical characterization of 2D as-deposited layers on Si that electrically interact with the substrate. The test method is illustrated by investigation of 3 different nm-thin layers that are expected to form an interfacial layer of negative fixed charge. A test procedure is described that gives a low turnaround time and non-destructive way of evaluating different deposition methods in terms of diode characteristics, interface conductance, and electron carrier injection into the deposited layer.

KW - aluminum

KW - atomic layer deposition

KW - boron

KW - chemical vapor deposition

KW - electron injection

KW - interface charge

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U2 - 10.1109/ICMTS.2018.8383767

DO - 10.1109/ICMTS.2018.8383767

M3 - Conference contribution

SN - 978-1-5386-5069-1

T3 - IEEE International Conference on Microelectronic Test Structures

SP - 69

EP - 74

BT - ICMTS 2018 - Proceedings of the 2018 IEEE International Conference on Microelectronic Test Structures

PB - IEEE

CY - Piscataway, NJ

T2 - 31st IEEE International Conference on Microelectronic Test Structures 2018

Y2 - 19 March 2018 through 22 March 2018

ER -

Test structures without metal contacts for DC measurement of 2D-materials deposited on silicon

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