Testability analysis of analog systems

G.J. Hemink; B.W. Meijer; H.G. Kerkhoff

doi:10.1109/43.55186

Testability analysis of analog systems

G.J. Hemink
, B.W. Meijer
, H.G. Kerkhoff

Research output: Contribution to journal › Article › Academic › peer-review

41 Citations (Scopus)

603 Downloads (Pure)

Abstract

A method is presented to analyze the testability of both linear and nonlinear analog systems. It combines a rank-test algorithm with statistical methods. The algorithm will find sets of dependent parameters and determine whether it is possible to calculate a certain parameter with sufficient accuracy. it also determines a subset of appropriate measurements if redundant measurements are present

Original language	English
Pages (from-to)	573-583
Number of pages	11
Journal	IEEE transactions on computer-aided design of integrated circuits and systems
Volume	9
Issue number	6
DOIs	https://doi.org/10.1109/43.55186
Publication status	Published - 1990

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10.1109/43.55186

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Cite this

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title = "Testability analysis of analog systems",

abstract = "A method is presented to analyze the testability of both linear and nonlinear analog systems. It combines a rank-test algorithm with statistical methods. The algorithm will find sets of dependent parameters and determine whether it is possible to calculate a certain parameter with sufficient accuracy. it also determines a subset of appropriate measurements if redundant measurements are present",

author = "G.J. Hemink and B.W. Meijer and H.G. Kerkhoff",

year = "1990",

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AU - Meijer, B.W.

AU - Kerkhoff, H.G.

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AB - A method is presented to analyze the testability of both linear and nonlinear analog systems. It combines a rank-test algorithm with statistical methods. The algorithm will find sets of dependent parameters and determine whether it is possible to calculate a certain parameter with sufficient accuracy. it also determines a subset of appropriate measurements if redundant measurements are present

U2 - 10.1109/43.55186

DO - 10.1109/43.55186

M3 - Article

SN - 0278-0070

VL - 9

SP - 573

EP - 583

JO - IEEE transactions on computer-aided design of integrated circuits and systems

JF - IEEE transactions on computer-aided design of integrated circuits and systems

IS - 6

ER -