Testable Design and Testing of Microsystems

Research output: Chapter in Book/Report/Conference proceedingChapterAcademicpeer-review

Abstract

The low internal node accessibility of microsystems and the variety of components and technologies used in these system scan be considered as a real challenge for testing these devices. Although many concept scan be applied which have already been developed for testing boards and ICs, also new aspects like sensor/actuator testing have to be considered. The choice which of the many approaches is most adequate turns out to be very application dependent. Test approaches are shown for two microsystems.
Original languageUndefined
Title of host publicationDesign of Systems on a Chip
EditorsRicardo Reis, Marcelo Lubaszewski, Jochen A.G. Jess
Place of PublicationBerlin - Heidelberg - New York
PublisherSpringer
Pages203-219
Number of pages17
ISBN (Print)978-0-387-32499-9
DOIs
Publication statusPublished - 2006

Publication series

Name
PublisherSpringer
Number06EX1521

Keywords

  • Design-for-Test - Testing - BIST - Test Busses - Boundary-Scan - Sensor/Actuator Testing - Microsystems - MCMs
  • IR-63654
  • METIS-237570
  • EWI-8047

Cite this

Kerkhoff, H. G. (2006). Testable Design and Testing of Microsystems. In R. Reis, M. Lubaszewski, & J. A. G. Jess (Eds.), Design of Systems on a Chip (pp. 203-219). Berlin - Heidelberg - New York: Springer. https://doi.org/10.1007/0-387-32500-X_10
Kerkhoff, Hans G. / Testable Design and Testing of Microsystems. Design of Systems on a Chip. editor / Ricardo Reis ; Marcelo Lubaszewski ; Jochen A.G. Jess. Berlin - Heidelberg - New York : Springer, 2006. pp. 203-219
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Kerkhoff, HG 2006, Testable Design and Testing of Microsystems. in R Reis, M Lubaszewski & JAG Jess (eds), Design of Systems on a Chip. Springer, Berlin - Heidelberg - New York, pp. 203-219. https://doi.org/10.1007/0-387-32500-X_10

Testable Design and Testing of Microsystems. / Kerkhoff, Hans G.

Design of Systems on a Chip. ed. / Ricardo Reis; Marcelo Lubaszewski; Jochen A.G. Jess. Berlin - Heidelberg - New York : Springer, 2006. p. 203-219.

Research output: Chapter in Book/Report/Conference proceedingChapterAcademicpeer-review

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AB - The low internal node accessibility of microsystems and the variety of components and technologies used in these system scan be considered as a real challenge for testing these devices. Although many concept scan be applied which have already been developed for testing boards and ICs, also new aspects like sensor/actuator testing have to be considered. The choice which of the many approaches is most adequate turns out to be very application dependent. Test approaches are shown for two microsystems.

KW - Design-for-Test - Testing - BIST - Test Busses - Boundary-Scan - Sensor/Actuator Testing - Microsystems - MCMs

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Kerkhoff HG. Testable Design and Testing of Microsystems. In Reis R, Lubaszewski M, Jess JAG, editors, Design of Systems on a Chip. Berlin - Heidelberg - New York: Springer. 2006. p. 203-219 https://doi.org/10.1007/0-387-32500-X_10