The Ability of DfDT Structures to Operate under Variations

H.J. Vermaak; H.G. Kerkhoff

The Ability of DfDT Structures to Operate under Variations

H.J. Vermaak
, H.G. Kerkhoff

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

Abstract

Recently, a new type of Design-for-Delay-Testability (DfDT) structure and associated Built-In Self-Test architecture for detecting delay faults in digital high-performance circuits has been proposed. It circumvents the requirement of an expensive high-speed tester. In this paper, the ability of the proposed structure to function correctly in an environment with process-and application-induced variations has been investigated. Practical solutions to ensure proper operation of the DfDT structure will be proposed and verified by means of simulation. Due to the critical timing necessary when detecting small delay faults it is crucial to know what to expect from these variations and subsequently reduce their influence.

Original language	English
Title of host publication	Proceedings SAFE, ProRISC, SeSens 2001
Subtitle of host publication	November 28-30 2001, Veldhoven, the Netherlands.
Place of Publication	Veldhoven, the Netherlands
Publisher	STW
Pages	694-699
Number of pages	6
Edition	CD
ISBN (Print)	90-73461-29-4
Publication status	Published - 29 Nov 2001
Event	14th ProRISC Workshop on Circuits, Systems and Signal Processing 2003 - Veldhoven, Netherlands Duration: 25 Nov 2003 → 27 Nov 2003 Conference number: 14

Workshop

Workshop	14th ProRISC Workshop on Circuits, Systems and Signal Processing 2003
Abbreviated title	ProRISC
Country/Territory	Netherlands
City	Veldhoven
Period	25/11/03 → 27/11/03

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title = "The Ability of DfDT Structures to Operate under Variations",

abstract = "Recently, a new type of Design-for-Delay-Testability (DfDT) structure and associated Built-In Self-Test architecture for detecting delay faults in digital high-performance circuits has been proposed. It circumvents the requirement of an expensive high-speed tester. In this paper, the ability of the proposed structure to function correctly in an environment with process-and application-induced variations has been investigated. Practical solutions to ensure proper operation of the DfDT structure will be proposed and verified by means of simulation. Due to the critical timing necessary when detecting small delay faults it is crucial to know what to expect from these variations and subsequently reduce their influence.",

author = "H.J. Vermaak and H.G. Kerkhoff",

year = "2001",

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T1 - The Ability of DfDT Structures to Operate under Variations

AU - Vermaak, H.J.

AU - Kerkhoff, H.G.

N1 - Conference code: 14

PY - 2001/11/29

Y1 - 2001/11/29

N2 - Recently, a new type of Design-for-Delay-Testability (DfDT) structure and associated Built-In Self-Test architecture for detecting delay faults in digital high-performance circuits has been proposed. It circumvents the requirement of an expensive high-speed tester. In this paper, the ability of the proposed structure to function correctly in an environment with process-and application-induced variations has been investigated. Practical solutions to ensure proper operation of the DfDT structure will be proposed and verified by means of simulation. Due to the critical timing necessary when detecting small delay faults it is crucial to know what to expect from these variations and subsequently reduce their influence.

AB - Recently, a new type of Design-for-Delay-Testability (DfDT) structure and associated Built-In Self-Test architecture for detecting delay faults in digital high-performance circuits has been proposed. It circumvents the requirement of an expensive high-speed tester. In this paper, the ability of the proposed structure to function correctly in an environment with process-and application-induced variations has been investigated. Practical solutions to ensure proper operation of the DfDT structure will be proposed and verified by means of simulation. Due to the critical timing necessary when detecting small delay faults it is crucial to know what to expect from these variations and subsequently reduce their influence.

M3 - Conference contribution

SN - 90-73461-29-4

SP - 694

EP - 699

BT - Proceedings SAFE, ProRISC, SeSens 2001

PB - STW

CY - Veldhoven, the Netherlands

T2 - 14th ProRISC Workshop on Circuits, Systems and Signal Processing 2003

Y2 - 25 November 2003 through 27 November 2003

ER -

The Ability of DfDT Structures to Operate under Variations

Abstract

Workshop

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