The Aethereal Network on Chip after Ten Years: Goals, Evolution, Lessons, and Future

Kees Goossens, A. Hansson

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    149 Citations (Scopus)


    The goals for the Æthereal network on silicon, as it was then called, were set in 2000 and its concepts were defined early 2001. Ten years on, what has been achieved? Did we meet the goals, and what is left of the concepts? In this paper we answer those questions, and evaluate different implementations, based on a new performance: cost analysis. We discuss and reflect on our experiences, and conclude with open issues and future directions.
    Original languageUndefined
    Title of host publicationProceedings of the 47th Design Automation Conference, DAC 2010
    Place of PublicationNew York
    PublisherAssociation for Computing Machinery
    Number of pages6
    ISBN (Print)978-1-4503-0002-5
    Publication statusPublished - 13 Jun 2010
    Event47th Annual Design Automation Conference, DAC 2010 - Anaheim, United States
    Duration: 13 Jun 201018 Jun 2010

    Publication series



    Conference47th Annual Design Automation Conference, DAC 2010
    Abbreviated titleDAC
    Country/TerritoryUnited States


    • METIS-271168
    • CAES-EEA: Efficient Embedded Architectures
    • EWI-18973
    • IR-75034

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