Abstract
High-performance digital circuits with aggressive timing constraints are usually very susceptible to delay faults. Much research done on delay fault detection needs a rather complicated test setup together with precise test clock requirements. In this paper, we propose a test technique based on the digital oscillation test method. The technique, which was simulated in software, consists of sensitizing a critical path in the digital circuit under test and incorporating the path into an oscillation ring. The supply voltage to the oscillation ring is then varied to detect delay and stuck-at faults in the path.
| Original language | English |
|---|---|
| Title of host publication | Proceeding Annual Workshop on Circuits, Systems and Signal Processing, ProRISC 2002 |
| Publisher | STW |
| Pages | 520-525 |
| Number of pages | 6 |
| ISBN (Print) | 90-73461-33-2 |
| Publication status | Published - 28 Nov 2002 |
| Event | 13th Workshop on Circuits, Systems and Signal Processing, ProRISC 2002 - Veldhoven, Netherlands Duration: 28 Nov 2002 → 29 Nov 2002 Conference number: 13 |
Workshop
| Workshop | 13th Workshop on Circuits, Systems and Signal Processing, ProRISC 2002 |
|---|---|
| Country/Territory | Netherlands |
| City | Veldhoven |
| Period | 28/11/02 → 29/11/02 |
Keywords
- Delay fault testing
- Oscillation test method
- Low-voltage supply testing
Fingerprint
Dive into the research topics of 'The Application of a Square-Wave Supply Voltage to Detect Small Delay Faults in High-Speed Digital Circuits'. Together they form a unique fingerprint.Cite this
- APA
- Author
- BIBTEX
- Harvard
- Standard
- RIS
- Vancouver