Abstract
A 6-bit 1.2 Gs/s non-calibrated flash ADC in a standard
45nm CMOS process, that achieves 0.45pJ/conv-step at full
Nyquist bandwidth, is presented. Power efficient operation is achieved by a full optimization of amplifier blocks, and by innovations in the comparator and encoding stage. The performance of a non-calibrated flash ADC is directly related to device properties;
a scaling analysis of our ADC in and across CMOS technologies gives insight into the excellent usability of 45nm technology for AD converter design.
Original language | Undefined |
---|---|
Title of host publication | Prorisc 2009. 20th Annual Workshop on circuits, Systems and Signal Processing |
Place of Publication | Utrecht |
Publisher | STW |
Pages | 380-383 |
Number of pages | 4 |
ISBN (Print) | 978-90-73461-62-8 |
Publication status | Published - 26 Nov 2009 |
Event | 20th Annual Workshop on circuits, Systems and Signal Processing, Prorisc 2009 - Veldhoven, Netherlands Duration: 26 Nov 2009 → 27 Nov 2009 Conference number: 20 |
Publication series
Name | |
---|---|
Publisher | STW |
Conference
Conference | 20th Annual Workshop on circuits, Systems and Signal Processing, Prorisc 2009 |
---|---|
Country/Territory | Netherlands |
City | Veldhoven |
Period | 26/11/09 → 27/11/09 |
Keywords
- METIS-265789
- EWI-17425
- IR-70027