The influence of technology variation on ggNMOSTs and SCRs against CDM BSD stress

M.S.B. Sowariraj*, Cora Salm, Ton Mouthaan, Fred G. Kuper, Theo Smedes

*Corresponding author for this work

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    Abstract

    In this paper we present a systematic study on the effect of process and layout variation for grounded-gate NMOSTs and L VTSCRs in a 0.18μ,m technology under negative non-socketed Charged Device Model (CDM) stress. Failure Analysis of the stressed devices was done using Scanning Electron Microscopy (SEM). A comparison of the CDM test results with those of ggNMOSTs in various other technologies is also presented. It is shown that the CDM robustness of ggNMOSTs increases with technology scaling and that the performance ofL VTSCRs can be as good as that of ggNMOSTs under CDM stresses.
    Original languageEnglish
    Pages (from-to)1287-1292
    Number of pages6
    JournalMicroelectronics reliability
    Volume42
    Issue number9-11
    DOIs
    Publication statusPublished - 2002
    Event13th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, ESREF 2002 - Bellaria, Italy
    Duration: 7 Oct 200211 Oct 2002
    Conference number: 13

    Keywords

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