The influence of technology variation on ggNMOSTs and SCRs against CDM ESD stress

M.S.B. Sowariraj; Cora Salm; A.J. Mouthaan; T Smedes; F.G. Kuper

doi:10.1016/S0026-2714(02)00136-1

The influence of technology variation on ggNMOSTs and SCRs against CDM ESD stress

M.S.B. Sowariraj, Cora Salm, A.J. Mouthaan, T Smedes, F.G. Kuper

Research output: Contribution to journal › Article › Academic › peer-review

Abstract

In this paper we present a systematic study on the effect of process and layout variation for grounded-gate NMOSTs and LVTSCRs in a 0.18

Original language	Undefined
Article number	10.1016/S0026-2714(02)00136-1
Pages (from-to)	1287-1292
Number of pages	5
Journal	Microelectronics reliability
Volume	42
Issue number	9-11
DOIs	https://doi.org/10.1016/S0026-2714(02)00136-1
Publication status	Published - 9 Nov 2002

Keywords

IR-67755
EWI-15580

Access to Document

10.1016/S0026-2714(02)00136-1

http://eprints.eemcs.utwente.nl/secure2/15580/01/sowariraj_micr_rel.pdf

Cite this

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title = "The influence of technology variation on ggNMOSTs and SCRs against CDM ESD stress",

abstract = "In this paper we present a systematic study on the effect of process and layout variation for grounded-gate NMOSTs and LVTSCRs in a 0.18",

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author = "M.S.B. Sowariraj and Cora Salm and A.J. Mouthaan and T Smedes and F.G. Kuper",

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AU - Mouthaan, A.J.

AU - Smedes, T

AU - Kuper, F.G.

PY - 2002/11/9

Y1 - 2002/11/9

N2 - In this paper we present a systematic study on the effect of process and layout variation for grounded-gate NMOSTs and LVTSCRs in a 0.18

AB - In this paper we present a systematic study on the effect of process and layout variation for grounded-gate NMOSTs and LVTSCRs in a 0.18

KW - IR-67755

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DO - 10.1016/S0026-2714(02)00136-1

M3 - Article

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JF - Microelectronics reliability

SN - 0026-2714

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