TY - JOUR
T1 - Theory and Implementation of a Load-Mismatch Protective Class-E PA System
AU - Ponte, Jeroen
AU - Ghahremani, Ali
AU - Huiskamp, Maikel
AU - Annema, Anne-Johan
AU - Nauta, Bram
N1 - Funding Information:
Manuscript received March 18, 2019; revised May 27, 2019; accepted June 24, 2019. Date of publication July 22, 2019; date of current version January 31, 2020. This work was supported by the Dutch NWO-TTO Sherpas Project under Grant 12903. This paper was recommended by Associate Editor F. Rivet. (Corresponding author: Jeroen Ponte.) J. Ponte, M. Huiskamp, A.-J. Annema, and B. Nauta are with the Department of Electrical Engineering, Mathematics and Computer Science, University of Twente, 7500 AE Enschede, The Netherlands (e-mail: [email protected]; [email protected]).
Publisher Copyright:
© 2004-2012 IEEE.
PY - 2020/2/1
Y1 - 2020/2/1
N2 - Highly efficient switch-mode class-E power amplifiers (PAs) are sensitive to load impedance variations. For voltage standing wave ratios (VSWRs) up to 10:1, the peak switch voltage and the average switch current can increase by a factor of 1.7 and 2.5, respectively, relative to those under nominal load conditions, imposing serious reliability risks. This paper describes a technique to self-protect class-E PAs to decrease their sensitivity to load variations, relying on the tuning of the switch-tank relative-resonance frequency, implemented by an on-chip switched-capacitor bank (SCB). To validate the technique, load-pullmeasurements are conducted on a class-E PA implemented in a standard 65-nm CMOS technology, employing an off-chip matching network, augmented with a fully automated self-protective control loop. Under nominal conditions, the PA provides 17.8dBm at 1.4GHz into 50 from a 1.2-V supply with 67% efficiency. The proposed self-protective PA can reduce its peak switch voltage below the technology- and switch designrelated limit for any load with a VSWR up to 19:1 while not considerably impacting output power and efficiency, which see a maximum degradation of 1.6dB and 6%, respectively. Furthermore, a class-E PA designed to safely handle 2.5× the nominal average switch current can reliably operate for VSWRs up to 19:1 when protected with our technique.
AB - Highly efficient switch-mode class-E power amplifiers (PAs) are sensitive to load impedance variations. For voltage standing wave ratios (VSWRs) up to 10:1, the peak switch voltage and the average switch current can increase by a factor of 1.7 and 2.5, respectively, relative to those under nominal load conditions, imposing serious reliability risks. This paper describes a technique to self-protect class-E PAs to decrease their sensitivity to load variations, relying on the tuning of the switch-tank relative-resonance frequency, implemented by an on-chip switched-capacitor bank (SCB). To validate the technique, load-pullmeasurements are conducted on a class-E PA implemented in a standard 65-nm CMOS technology, employing an off-chip matching network, augmented with a fully automated self-protective control loop. Under nominal conditions, the PA provides 17.8dBm at 1.4GHz into 50 from a 1.2-V supply with 67% efficiency. The proposed self-protective PA can reduce its peak switch voltage below the technology- and switch designrelated limit for any load with a VSWR up to 19:1 while not considerably impacting output power and efficiency, which see a maximum degradation of 1.6dB and 6%, respectively. Furthermore, a class-E PA designed to safely handle 2.5× the nominal average switch current can reliably operate for VSWRs up to 19:1 when protected with our technique.
KW - CMOS integrated circuits
KW - load mismatch
KW - VSWR
KW - power amplifiers (PAs)
KW - class-E PA
KW - Self-healing
KW - self-protecting
U2 - 10.1109/TCSI.2019.2926468
DO - 10.1109/TCSI.2019.2926468
M3 - Article
SN - 1549-8328
VL - 67
SP - 369
EP - 377
JO - IEEE transactions on circuits and systems I: regular papers
JF - IEEE transactions on circuits and systems I: regular papers
IS - 2
M1 - 8768004
ER -