Transmission Lines in CMOS: An Explorative Study

Eric A.M. Klumperink, R. Kreienkamp, T. Ellermeyer, U. Langmann

    Research output: Contribution to conferencePaper

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    Abstract

    On-chip transmission line modelling and design become increasingly important as frequencies are continuously going up. This paper explores possibilities to implement transmission lines on CMOS ICs via coupled coplanar strips. EM-field simulations with SONNET are used to estimate important transmission line properties like characteristic impedance, propagation velocity and loss in a 0.18 micron CMOS Technology. Both metal losses and substrate losses are modeled. Special attention is paid to the effect of the Silicon substrate, in particular to the so called “slow-wave mode‿ that can occur in the Si-SiO2 system.
    Original languageUndefined
    Number of pages6
    Publication statusPublished - Nov 2001
    Event14th ProRISC Workshop on Circuits, Systems and Signal Processing 2003 - Veldhoven, Netherlands
    Duration: 25 Nov 200327 Nov 2003
    Conference number: 14

    Workshop

    Workshop14th ProRISC Workshop on Circuits, Systems and Signal Processing 2003
    Abbreviated titleProRISC
    CountryNetherlands
    CityVeldhoven
    Period25/11/0327/11/03

    Keywords

    • CMOS
    • IR-67426
    • RF
    • EWI-14359
    • microwave techniques
    • Waveguide
    • Radio frequency
    • Transmission line

    Cite this

    Klumperink, E. A. M., Kreienkamp, R., Ellermeyer, T., & Langmann, U. (2001). Transmission Lines in CMOS: An Explorative Study. Paper presented at 14th ProRISC Workshop on Circuits, Systems and Signal Processing 2003, Veldhoven, Netherlands.