Tunable n-path notch filters for blocker suppression: modeling and verification

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    Abstract

    N-path switched-RC circuits can realize filters with very high linearity and compression point while they are tunable by a clock frequency. In this paper, both differential and single-ended N-path notch filters are modeled and analyzed. Closed-form equations provide design equations for the main filtering characteristics and nonidealities such as: harmonic mixing, switch resistance, mismatch and phase imbalance, clock rise and fall times, noise, and insertion loss. Both an eight-path single-ended and differential notch filter are implemented in 65-nm CMOS technology. The notch center frequency, which is determined by the switching frequency, is tunable from 0.1 to 1.2 GHz. In a 50- environment, the N-path filters provide power matching in the passband with an insertion loss of 1.4–2.8 dB. The rejection at the notch frequency is 21–24 dB,P1 db> + 2 dBm, and IIP3 > + 17 dBm.
    Original languageEnglish
    Pages (from-to)1370-1382
    Number of pages13
    JournalIEEE journal of solid-state circuits
    Volume48
    Issue number6
    DOIs
    Publication statusPublished - 1 Jun 2013

    Keywords

    • EWI-23470
    • METIS-297713
    • IR-86403

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