Two Architectures for On-chip Virtual Channel Router

N.K. Kavaldjiev; Gerardus Johannes Maria Smit; P.G. Jansen

Two Architectures for On-chip Virtual Channel Router

N.K. Kavaldjiev, Gerardus Johannes Maria Smit, P.G. Jansen

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic

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Abstract

This paper compares the implementation results of two architectures for virtual channel router. Since the router is used for building an on-chip network, its small size is critical. Together with the total design area we provide information about the distribution of this area between the main router blocks and thus give insight about the cost of each block. The comparison shows that one of the architectures results in smaller implementation area and overcomes some performance problems presented by the other architecture.

Original language	Undefined
Title of host publication	5th PROGRESS Symposium on Embedded Systems
Place of Publication	Utrecht, The Netherlands
Publisher	STW
Pages	90-95
Number of pages	6
ISBN (Print)	90-73461-41-3
Publication status	Published - Oct 2004
Event	5th PROGRESS Symposium on Embedded Systems 2004 - Nieuwegein, Netherlands Duration: 20 Oct 2004 → 20 Oct 2004 Conference number: 5

Publication series

Name
Publisher	STW Technology Foundation

Conference

Conference	5th PROGRESS Symposium on Embedded Systems 2004
Abbreviated title	PROGRESS
Country/Territory	Netherlands
City	Nieuwegein
Period	20/10/04 → 20/10/04

Keywords

METIS-221675
EWI-776
IR-49388
CAES-EEA: Efficient Embedded Architectures

Access to Document

Cite this

@inproceedings{e36e040a428749888bd05fb53b1ca677,

title = "Two Architectures for On-chip Virtual Channel Router",

abstract = "This paper compares the implementation results of two architectures for virtual channel router. Since the router is used for building an on-chip network, its small size is critical. Together with the total design area we provide information about the distribution of this area between the main router blocks and thus give insight about the cost of each block. The comparison shows that one of the architectures results in smaller implementation area and overcomes some performance problems presented by the other architecture.",

keywords = "METIS-221675, EWI-776, IR-49388, CAES-EEA: Efficient Embedded Architectures",

author = "N.K. Kavaldjiev and Smit, {Gerardus Johannes Maria} and P.G. Jansen",

note = "Imported from DIES; 5th PROGRESS Symposium on Embedded Systems 2004 ; Conference date: 20-10-2004 Through 20-10-2004",

year = "2004",

month = oct,

language = "Undefined",

isbn = "90-73461-41-3",

publisher = "STW",

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booktitle = "5th PROGRESS Symposium on Embedded Systems",

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TY - GEN

T1 - Two Architectures for On-chip Virtual Channel Router

AU - Kavaldjiev, N.K.

AU - Smit, Gerardus Johannes Maria

AU - Jansen, P.G.

N1 - Conference code: 5

PY - 2004/10

Y1 - 2004/10

N2 - This paper compares the implementation results of two architectures for virtual channel router. Since the router is used for building an on-chip network, its small size is critical. Together with the total design area we provide information about the distribution of this area between the main router blocks and thus give insight about the cost of each block. The comparison shows that one of the architectures results in smaller implementation area and overcomes some performance problems presented by the other architecture.

AB - This paper compares the implementation results of two architectures for virtual channel router. Since the router is used for building an on-chip network, its small size is critical. Together with the total design area we provide information about the distribution of this area between the main router blocks and thus give insight about the cost of each block. The comparison shows that one of the architectures results in smaller implementation area and overcomes some performance problems presented by the other architecture.

KW - METIS-221675

KW - EWI-776

KW - IR-49388

KW - CAES-EEA: Efficient Embedded Architectures

M3 - Conference contribution

SN - 90-73461-41-3

SP - 90

EP - 95

BT - 5th PROGRESS Symposium on Embedded Systems

PB - STW

CY - Utrecht, The Netherlands

T2 - 5th PROGRESS Symposium on Embedded Systems 2004

Y2 - 20 October 2004 through 20 October 2004

ER -