Two-level pipelined systolic array graphics engine

J.A.K.S. Jayasinghe, G. Karagiannis, F. Moelaert El-Hadidy, O.E. Herrmann, J. Smit

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    A silicon implementation of a two-level pipelined SAG (systolic array graphics) engine supporting an advanced instructions set is reported. The advantage of the two-level pipelining is that it can provide a complex functionality at high pixel rates, which is difficult to achieve by other means using less silicon area. As computer graphics users have a great desire for high image quality, high interaction speed and high resolution, it is expected that two-level pipelined SAG engines will be a breakthrough for real-time computer graphics
    Original languageEnglish
    Title of host publicationIEEE Proceedings of the Custom Integrated Circuits Conference 1990
    Place of PublicationPiscataway, NJ
    Number of pages4
    Publication statusPublished - 1 May 1990
    EventIEEE Custom Integrated Circuits Conference, CICC 1990 - Boston, United States
    Duration: 13 May 199016 May 1990


    ConferenceIEEE Custom Integrated Circuits Conference, CICC 1990
    Abbreviated titleCICC
    Country/TerritoryUnited States


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