Ultra-high aspect-ratio FinFET technology

Vladimir Jovanović*, Tomislav Suligoj, Mirko Poljak, Yann Civale, Lis K. Nanver

*Corresponding author for this work

Research output: Contribution to journalArticleAcademicpeer-review

22 Citations (Scopus)

Abstract

FinFETs with ultra-large height-to-width ratio have been processed on (1 1 0) bulk silicon wafers by employing crystallographic etching of silicon with TMAH, which results in nearly vertical sidewalls with a (1 1 1)/〈1 1 2〉 surface orientation. Tall fins, which corresponds to wide transistor channels per single fin offer more efficient use of the silicon area and improved performance for multi-fin devices in high-frequency analog applications. N-channel FinFETs with 1.9-nm-wide fins demonstrate the downscaling potential of the technology and devices with a height of the active part of the fin of 625 nm have the largest aspect-ratio of the fins reported thus far. Both devices with highly and moderately scaled fin-widths exhibit excellent subthreshold performance while electrons have higher mobility in 15-nm-wide FinFETs, which gives them larger on-state currents. The comparison between FinFETs and wide tri-gate devices shows that FinFETs have better current drivability in this simple process, even with larger source/drain series resistances. The differences in threshold voltage and low-field electron mobility between 1.9-nm-wide and 15-nm-wide FinFETs have been related to the increase in subband energies due to carrier confinement in the extremely narrow fins.

Original languageEnglish
Pages (from-to)870-876
Number of pages7
JournalSolid-state electronics
Volume54
Issue number9
DOIs
Publication statusPublished - 1 Sep 2010
Externally publishedYes

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Keywords

  • (1 1 1) Channel
  • Carrier confinement
  • CMOS
  • FinFET
  • TMAH

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