Ultra-Low Voltage 4-to-2 Compressors for Near-Vth Computing

Anuradha C. Ranasinghe*, Sabih H. Gerez

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review


This paper presents two novel circuit arrangements for an ultra-low voltage, low-power 4-to-2 compressor targeting typical near-V th application domain. A hybrid logic style is utilized to exploit energy efficiency by means of parasitic reduction in circuit blocks. Proposed structures are evaluated against prevalent compressors in terms of their typical figure of merits and noise immunity. From extensive post-layout simulations in 65-nm bulk CMOS process technology, the most optimal arrangement was found to be 35% more power efficient, 3.4% faster, 8% more area efficient and 37% better in PDP at 0.4V DD compared to most appealing implementations in literature.
Original languageEnglish
Title of host publicationIEEE International Symposium on Circuits and Systems (ISCAS)
Number of pages5
ISBN (Electronic)978-1-7281-3320-1
ISBN (Print)978-1-7281-3321-8
Publication statusPublished - 2020
EventIEEE International Symposium on Circuits and Systems, ISCAS 2020 - Virtual Conference, Sevilla, Spain
Duration: 10 Oct 202021 Oct 2020


ConferenceIEEE International Symposium on Circuits and Systems, ISCAS 2020
Abbreviated titleISCAS
Internet address


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