Using memristor state change behavior to identify faults in photovoltaic arrays

Jimson Mathew; Marco Ottavi; Yuanfan Yang; Dhiraj K. Pradhan

doi:10.1109/DFT.2014.6962094

Using memristor state change behavior to identify faults in photovoltaic arrays

Jimson Mathew, Marco Ottavi, Yuanfan Yang, Dhiraj K. Pradhan

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

5 Citations (Scopus)

Abstract

Memristor is an emerging non-volatile memory device that features smaller size and hybrid memristor/CMOS integration, which maximizes the advantages of high density and versatility. In this paper we utilize the memristor as weights and its state change behavior to capture some of the potential faults in a system. Photovoltaic arrays are taken as an example for the study. We will demonstrate that the state variations can be mapped into a timing which can be used as useful information for behavior of the system under measurement. Empirical studies are carried out using Spice based simulations to investigate into the impact of biasing and threshold voltages on timing behavior. Underpinning these studies, a relationship between input voltage and memristor state transition is proposed and extensively validated through further simulations to identify specific faulty behavior.

Original language	English
Title of host publication	Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
Place of Publication	Piscataway, NJ
Publisher	IEEE
ISBN (Electronic)	978-1-4799-6155-9
DOIs	https://doi.org/10.1109/DFT.2014.6962094
Publication status	Published - 2014
Externally published	Yes
Event	International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2014 - Amsterdam, Netherlands Duration: 1 Oct 2014 → 3 Oct 2014

Conference

Conference	International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2014
Abbreviated title	DFT 2014
Country/Territory	Netherlands
City	Amsterdam
Period	1/10/14 → 3/10/14

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10.1109/DFT.2014.6962094

Cite this

@inproceedings{8452b18e37ff42efbb547b089c0142cf,

title = "Using memristor state change behavior to identify faults in photovoltaic arrays",

abstract = "Memristor is an emerging non-volatile memory device that features smaller size and hybrid memristor/CMOS integration, which maximizes the advantages of high density and versatility. In this paper we utilize the memristor as weights and its state change behavior to capture some of the potential faults in a system. Photovoltaic arrays are taken as an example for the study. We will demonstrate that the state variations can be mapped into a timing which can be used as useful information for behavior of the system under measurement. Empirical studies are carried out using Spice based simulations to investigate into the impact of biasing and threshold voltages on timing behavior. Underpinning these studies, a relationship between input voltage and memristor state transition is proposed and extensively validated through further simulations to identify specific faulty behavior.",

author = "Jimson Mathew and Marco Ottavi and Yuanfan Yang and Pradhan, {Dhiraj K.}",

year = "2014",

doi = "10.1109/DFT.2014.6962094",

language = "English",

booktitle = "Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems",

publisher = "IEEE",

address = "United States",

note = "International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2014, DFT 2014 ; Conference date: 01-10-2014 Through 03-10-2014",

}

Mathew, J, Ottavi, M, Yang, Y & Pradhan, DK 2014, Using memristor state change behavior to identify faults in photovoltaic arrays. in Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. IEEE, Piscataway, NJ, International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2014, Amsterdam, Netherlands, 1/10/14. https://doi.org/10.1109/DFT.2014.6962094

Using memristor state change behavior to identify faults in photovoltaic arrays. / Mathew, Jimson; Ottavi, Marco; Yang, Yuanfan et al.
Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. Piscataway, NJ: IEEE, 2014.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - Using memristor state change behavior to identify faults in photovoltaic arrays

AU - Mathew, Jimson

AU - Ottavi, Marco

AU - Yang, Yuanfan

AU - Pradhan, Dhiraj K.

PY - 2014

Y1 - 2014

N2 - Memristor is an emerging non-volatile memory device that features smaller size and hybrid memristor/CMOS integration, which maximizes the advantages of high density and versatility. In this paper we utilize the memristor as weights and its state change behavior to capture some of the potential faults in a system. Photovoltaic arrays are taken as an example for the study. We will demonstrate that the state variations can be mapped into a timing which can be used as useful information for behavior of the system under measurement. Empirical studies are carried out using Spice based simulations to investigate into the impact of biasing and threshold voltages on timing behavior. Underpinning these studies, a relationship between input voltage and memristor state transition is proposed and extensively validated through further simulations to identify specific faulty behavior.

AB - Memristor is an emerging non-volatile memory device that features smaller size and hybrid memristor/CMOS integration, which maximizes the advantages of high density and versatility. In this paper we utilize the memristor as weights and its state change behavior to capture some of the potential faults in a system. Photovoltaic arrays are taken as an example for the study. We will demonstrate that the state variations can be mapped into a timing which can be used as useful information for behavior of the system under measurement. Empirical studies are carried out using Spice based simulations to investigate into the impact of biasing and threshold voltages on timing behavior. Underpinning these studies, a relationship between input voltage and memristor state transition is proposed and extensively validated through further simulations to identify specific faulty behavior.

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U2 - 10.1109/DFT.2014.6962094

DO - 10.1109/DFT.2014.6962094

M3 - Conference contribution

BT - Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

PB - IEEE

CY - Piscataway, NJ

T2 - International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2014

Y2 - 1 October 2014 through 3 October 2014

ER -

Using memristor state change behavior to identify faults in photovoltaic arrays

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