Abstract
The effect of quantum confinement in thin siliconon-insulator double-gate MOSFETs has been directly determined from subthreshold current measurements for the first time. By comparing temperature-dependent subthreshold characteristics of p-type devices with different silicon layer thicknesses, the offset in the valence band edge induced by spatial carrier confinement in these very thin silicon layers wasmeasured electrically. Changes in the band structure are important for future CMOS devices such as FinFETs
Original language | English |
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Pages (from-to) | 821-824 |
Number of pages | 4 |
Journal | IEEE electron device letters |
Volume | 28 |
Issue number | 9 |
DOIs | |
Publication status | Published - 1 Sep 2007 |
Keywords
- SC-DPM: Device Physics and Modeling
- Bandgap
- Carrier confinement
- Conduction band
- Device characterization
- MOSFETs
- Silicon-on-insulator (SOI) technology
- Subthreshold
- Temperature
- Valence band