Virtual Analysis and Reduction of Side-Channel Vulnerabilities of Smartcards

Jerry den Hartog, Erik de Vink

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

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    Abstract

    This paper focuses on the usability of the PINPAS tool. The PINPAS tool is an instruction-level interpreter for smartcard assembler languages, augmented with facilities to study side-channel vulnerabilities. The tool can simulate side-channel leakage and has a suite of utilities to analyze this. The usage of the tool, for the analysis of a cryptographic algorithm is illustrated using the standard AES and RSA. Vulnerabilities of the implementations are identified and protective measures added. It is argued, that the tool can be instrumental for the design and realization of secure smartcard implementations in a systematic way.
    Original languageEnglish
    Title of host publication2nd Int. Workshop on Formal Aspect of Security and Trust (FAST)
    EditorsTheo Dimitrakos, Fabio Martinelli
    Place of PublicationBoston, MA
    PublisherSpringer
    Pages85-98
    Number of pages14
    ISBN (Electronic)978-0-387-24098-5
    ISBN (Print)978-0-387-24050-3
    DOIs
    Publication statusPublished - Aug 2004
    EventIFIP TC1 WG1.7 Workshop on Formal Aspects in Security and Trust, FAST 2004 - Toulouse, France
    Duration: 22 Aug 200427 Aug 2004

    Publication series

    NameIFIP International Federation for Information Processing
    PublisherKluwer Academic Publishers
    Volume173
    ISSN (Print)1571-5736

    Workshop

    WorkshopIFIP TC1 WG1.7 Workshop on Formal Aspects in Security and Trust, FAST 2004
    Abbreviated titleFAST
    Country/TerritoryFrance
    CityToulouse
    Period22/08/0427/08/04

    Keywords

    • Smartcad
    • Side-channel attack
    • Power analysis
    • Fault analysis
    • DPA
    • Simulation
    • Countermeasures
    • Systematic hardening

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